1. Field of the Invention
The present invention relates to a system for controlling data links, or High Level Data Link Controller (HDLC) circuit. It more particularly relates to the organization of the data exchanges between different components of such an HDLC circuit and a shared RAM.
2. Discussion of the Related Art
An example of application of the present invention relates to the implementation of an integrated HDLC circuit including one or several high level data link controllers (HDLC). One HDLC (or several) is to be found, for example, in cards, called line cards, of switch centers of a telecommunication network. These line cards are notably meant for branching the different communications which circulate, for example in multiplex, onto data links. The data relative to these communications, as well as the information that they require (for example, the transmission mode, the addressee, etc.), only transit through these line cards. A line card includes a RAM for temporarily storing the data and information relative to the communications. The line card also includes a microprocessor for, notably, controlling the exchanges between the different card components and, in particular, the accesses to the memory. A circuit to which the present invention applies can also be found, for example, in the sender-receiver of a group switching center of a telephone network.
Besides the microprocessor, several components associated with the HDLC controller regularly require access to the memory, whether to write in it or to read information and data from it. They thus need to have access to address and data buses of this memory. These components are, in particular, direct memory access controllers, or DMA controllers.